14. Mempool, MEV & Transaction Lifecycle
14.1 Implemented Ingress Components
The legacy ShardedMempool (743 lines plus seven sub-modules: pbs.rs, blob_transactions.rs, accountable_leader.rs, and others) has been replaced by a DAG-native ingress pipeline composed of TxIngressBuffer and VertexBuilder. The directory L1/src/mempool/ now contains only mod.rs (38 lines — the ZeroStakeProvider and FixedAgeProvider helpers used by the VertexBuilder). The former ShardedMempool is dead code and is no longer referenced anywhere in the consensus.
The active system is:
TxIngressBuffer(ingress.rs): signature validation, nonce check, prefilter → bounded per-shard channel.VertexBuilder(ingress.rs): drains the channel, applies STACC admission (quota + compute-unit metering), orders by nonce, runs conflict detection, and assembles the payload into aDAGVertex.
The DAG is the only durable record. There is no in-memory transaction persistence between vertices — the ingress buffer is drained at vertex construction time. The repository does not currently deploy an encrypted mempool or threshold-decryption protocol.
14.2 Transaction Lifecycle
The active lifecycle is:
- Signed transaction (ML-DSA-65) →
TxIngressBuffer.ingest()— signature validation, nonce check, chain check, prefilter. - Routing to a bounded per-shard channel.
VertexBuilder.build_vertex_payload()— drain the channel, STACC admission (quota, compute-unit metering), nonce ordering, conflict detection.- Assembly into a
DAGVertex(2–8 parents). - DAG consensus — committee votes, fast-path or standard path.
- Confirmation → state execution (
OptimisticExecutor). - Checkpoint finality (ML-DSA-65).
Exact ordering, confirmation latency, and resource admission depend on node configuration and must be measured on a multi-node network.
14.3 MEV Scope and Fair Ordering
Quantos does not currently rely on transaction encryption or threshold decryption for front-running protection. The active anti-MEV mechanism is fair ordering, now applied inside the VertexBuilder during the channel drain (nonce ordering + conflict detection) rather than in a separate mempool module. This removes proposer discretion over insertion order but does not hide transaction content.
Fair ordering and PBS are design modules. They can reduce proposer discretion or structure builder interaction, but they do not eliminate MEV, guarantee a fair outcome, or provide a complete market without deployment, incentive, and adversarial analysis.
14.4 Mainnet Requirements
A production ingress specification must fix admission limits, quota accounting, ordering rule, timeout behavior, blob availability, builder/proposer authorization, censorship resistance, and observability. Performance claims must report transaction mix, conflicts, failed admissions, and finality latency.